Three - state gate circuit
Chip select (usually with OE, where you use G) is reversed because it is set to low active;
DIR is the pin to control the direction of transmission, when DIR is high, the transmission direction is A → B, when DIR is low, the transmission direction is B → A. When the OE (19 pin) is low, 74245 is active and when the OE is high, the 74245 outputs a high impedance state and does not respond to any input signal.
In addition to the general gate circuit with the "1" output state and "0" output transitions, there is a "high impedance state", in the control port under the control of the output is high resistance when the equivalent of the The output of the gate circuit is not connected to the output line and appears as an "insulated" state.
Three-state gate circuit is widely used in data bus transmission, the so-called data bus transmission is a data line can transmit multiple data signals, the multiple data signals according to the provisions of the "order" transmission, so that the data line to the maximum time Utilization rate. As a result of multiple three-state gate output are connected to the data bus, so when the control instruction is not, the three-state gate output and the line are "insulated state", only the instructions to reach the three-state door to transmit data, Many of the three-state door in a moment can only have a door to transfer data.
In addition to the general gate circuit with the data input, output, there is a control "enable", only the control "enable" is valid to output the signal.
